| 光谱学与光谱分析 |
|
|
|
|
|
| Design and Implementation of Real-Time Processing Platform for Movement Error Correction of Hyperspectrual Imaging |
| YU Tao1,2, HU Bing-liang1*, GAO Xiao-hui1,2, WEI Ru-yi1,2, JING Juan-juan1,2 |
1. Xi’an Institute of Optics & Precision Mechanics, Chinese Academy of Sciences, Xi’an 710119, China
2. Graduate University of Chinese Academy of Sciences, Beijing 100049, China |
|
|
|
|
Abstract The approach that deals with compressed and packed image data transmitted from satellite to the ground is too slow for real-time application occasion, it also has huge image, multi-processing step and complexity recovery arithmetic synchronously, so it is urgent to build accurate and fast data processing platform for real-time processing. For the moment, the platform for data recovery and error correction is much less, the so-called successful platform may directly affect the effect of target detection and identification because of processing speed, precision, flexibility, configuration and upgrade. The platform we build is to set spatial modulation spectrometer as the research goal, We design and implement a hardware platform based on Xilinx Virtex-5 FPGA, It is combined with ISE IP soft-core resources which is configurable, high-precision and flexible by focusing on analyzing key aspects of the hardware platform. And the relevant test data were drawn, then a good way for spectrum recovery and error correction was explored.
|
|
Received: 2011-12-15
Accepted: 2012-02-07
|
|
|
|
Corresponding Authors:
HU Bing-liang
E-mail: hbl@opt.ac.cn
|
|
[1] FAN Shang-chun, ZHOU You(樊尚春，周 游). Journal of Beijing University of Aeronautics &Astronautics(北京航空航天大学学报)2008，34(6)：707.
[2] Hammer P D, Smith W H. Conference on Imaging Spectrometry, Orlando FL, SPIE Conference Proceedings, 1995，2480.
[3] Xiangli Bin, Gao Zhan, An Baoqing. Proc. SPIE, 1998, 3502: 30.
[4] LI Wei, SUN Jin-ping, WANG Jun, et al(李 伟，孙进平，王 俊，等). Journal of Beijing University of Aeronautics &Astronautics(北京航空航天大学学报) 2007, 33(12)：1140.
[5] YIN Shi-min, XIANGLI Bin, ZHOU Jin-song, et al(殷世民，相里斌，周锦松，等). Journal of Infrared and Millimeter Waves(红外与毫米波学报)，2007，26(4)：274.
[6] Fulton T R, Naylor D A, Baluteau J P, et al. Proc. SPIE, 2008, 7010: 70102T-1.
[7] Yoshida J, Kawashim A T. Proc. SPIE, 2008, 7082: 1.
[8] Akihiko Kuze, Hiroshi Suto, Kei Shiomi. Proc. SPIE, 2009, 7474: 747401-1.
[9] Rafert J B, Holbert E, Newby H, et al. Proc. SPIE, 1992, 1575: 263.
[10] Lucey P G, Horton K, Rafert J B, et al. Proc. SPIE, 1993, 1937: 130.
[11] Xilinx. Virtex-5 Integrated Endpoint Block for PCI Express Designs July 31, 2008.
[12] Howard W. Johnson Martin Graham High-Speed Digital Design Prentice Hall. 2000.
[13] ML507/506/507 PCIe X1 Endpoint Plus Design Creation Using ISE and CORE Generator 11. 1. May 2009.
[14] ML507/506/507 Getting Started Tutoria. June 18, 2009.
[15] Xilinx. Virtex-5 ML507/506/507 Reference Design June 29, 2008.
[16] Micron DDR2 SDRAM Small-Outline DIMM 256MB, 512MB, 1GB(X64, DR) 200-pin DDR2 SODIMM Feature. Micron Technology, Inc, 2006.
|
|
|
|
